Your tasks:

• Collaboration in the definition and further development of our RF system-on-chip architecture

• Responsibility for the RTL design of digital blocks and their integration at system level

• Close cooperation with the analog/RF team to implement highly integrated RF ASICs

• Development and implementation of functional verification at block and chip level

• Support with qualification, testing and ramp-up of our chips

• Documentation of the development processes and results

• Collaboration in an international team - therefore good English skills are required

Your profile:

• Completed studies in electrical engineering, microelectronics or a comparable field of study

• Sound knowledge of ASIC digital design, in particular SoC integration

• Good knowledge of SystemVerilog, Verilog or VHDL

• Experience in the development and application of modern verification methods (e.g. UVM)

• Ideally experience in working with mixed-signal design teams

• Knowledge of synthesis and timing analysis is an advantage

We offer:

• Permanent position with a high level of personal responsibility and very good development opportunities
• Work in an international, friendly and motivated team that will be happy to support you with any questions you may have
• Flat hierarchies, openness to change and appreciation of your ideas
• An appreciative corporate culture characterized by a high degree of team spirit and trust, regular team events
• Flexible working hours (flexitime) with 1 regular home office day per week, further opportunities for mobile working by arrangement
• Attractive benefits: free job or Germany ticket or job bike (monthly flat rate of €55) + free use of the gym in the building
• Bright and comfortable offices in a central Dresden location (Plauen)
• Fast and uncomplicated application process